Job Description

Summary ForwardEdge ASIC is seeking skilled and detail-oriented Physical Design Engineers to join our talent network. As a Physical Design Engineer, you will play a pivotal role in our semiconductor design team, focusing on the physical implementation of advanced ASIC designs. You will work closely with architecture, RTL, Logic design, Verification and Test & Validation teams to ensure high-performance, ASIC designs are successfully implemented and delivered to production. Key Responsibilities Perform floorplanning, power planning, and placement of digital and mixed-signal ASIC designs. Implement clock tree synthesis (CTS), route critical nets, and optimize design for timing, area, power, and signal integrity. Collaborate with front-end design teams to understand design constraints and ensure seamless handoff for physical implementation. Utilize advanced EDA tools and methodologies to achieve design closure within project timelines. Conduct physical verification checks (DRC, LVS, ERC) and work closely with sign-off teams to meet tape-out requirements. Resolve physical design issues related to timing closure, IR drop, EM/ESD violations, and other design challenges. Participate in design reviews and provide design optimization suggestions to enhance ASIC performance and manufacturability. Qualifications Bachelor’s degree in electrical engineering, or a related field with 3-7 years experiences. More experienced candidates will be considered for senior physical design roles. Proven experience in ASIC physical design, including floorplanning, placement, CTS, routing, and physical verification. Hands‑on expertise with EDA tools such as Synopsys ICC/ICC2, Cadence Innovus/EDI, or similar tools. Strong understanding of ASIC design flow from RTL to GDSII, including timing closure methodologies. Familiarity with scripting languages (Tcl, Perl, Python) for design automation and flow enhancements. Excellent problem‑solving skills and ability to work effectively in a dynamic team environment. Clearance: This position requires a US government security clearance. As such, US citizenship is required. Nice to Have Master’s degree in electrical engineering, or a related field. Work Environment The work environment for this role typically involves a combination of office‑based activities and collaboration with analog design, CAD, and physical verification teams. Occasional travel may be required for project meetings or customer engagements. Benefits Work‑life balance: Flexible 9/80 Work schedules with every other Friday off, hybrid work with primary location being in St. Paul, MN Competitive benefit package: Including options for healthcare and medical coverage, 401K Retirement Benefits with company contribution, as well as a generous holidays and PTO allotment. Selected candidate may also be eligible for short‑term and long‑term incentives. Note This requisition is designed to cultivate a talent pipeline for both present and future opportunities within our organization. We are proactively seeking qualified candidates to ensure a continuous flow of talent. Your application will be considered for upcoming positions within our company. #J-18808-Ljbffr Page Mechanical Group, Inc.

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