Join to apply for the Senior Physical Design Engineer(7051) role at TSMC .
As a Senior Physical Design Engineer, you will be responsible for the physical design implementation PnR run, Performance/Power/Area (PPA) comparison, congestion & DRC analysis, and design optimization. You may also do synthesis, debugging & data analysis, scripting, STA or timing analysis. Report to the Manager of Advanced Chip implementation team at its San Jose Design Center, California. Hybrid work schedule with 4 days in office.
TSMC is a trusted technology and capacity provider, the worlds leading dedicated semiconductor foundry and technology leader with a strong reputation for manufacturing excellence. TSMC supports a thriving ecosystem of global customers and partners, delivering cuttingedge technologies and design enablement solutions.
TSMC Technology, Inc. is committed to employing a diverse workforce and provides Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, or any other characteristic protected by applicable law. TSMC is an equal opportunity employer that prizes diversity and inclusion. We are committed to treating all employees and applicants for employment with respect and dignity. If you require reasonable accommodation due to a disability during the application or recruiting process, please notify us at G_Accommodations@tsmc.com.
At TSMC, your base pay is only part of your overall total compensation package. At the time of posting, this role typically pays a base salary between $108,000/yr and $167,500/yr. The actual pay may vary based on individual qualifications, experience and location. TSMCs total compensation package includes marketcompetitive pay, allowances, bonuses and comprehensive benefits.
MidSenior level
Fulltime
Engineering and Information Technology Semiconductor Manufacturing
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